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SubLVDS驱动电路的设计

作者:薛 江,陈红珍,史 峥 日期:2007-12-28/span> 浏览:3510 查看PDF文档

SubLVDS驱动电路的设计
薛 江,陈红珍,史 峥
(浙江大学 超大规模集成电路设计研究所,浙江 杭州 310027)

摘 要:SubLVDS是一种超低压摆幅的差分信号技术,与传统的低摆幅差与信号技术相比,它具有更高的比特率、更低的功耗、更好的噪声性能和更稳定的可靠性。分析了SubLVDS的技术原理和优势,并给出了SubLVDS高速驱动电路的设计,其中采用MOS电容组成的高速降幅电路,利用负反馈和米勒补偿稳定共模点,采用SMIC 0.18 μm工艺,1.8 V的供电,最后实现摆幅为150 mV的、速度为1 Gbps、PSRR大于60 db的驱动电路。
关键词:SubLVDS;驱动;差分;低摆幅


Design of SubLVDS driver circuit
XUE Jiang, CHEN Hongzhen, SHI Zheng
(Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China)

Abstract: SubLVDS(sublow voltage differential signaling) has many advantages such as highspeed, low power dissipation, improved noise margin and stabilization comparing with LVDS (low voltage differential signaling). The theory and superiority of SubLVDS was analyzed, then the design of its driver circuit was given. It adopted MOS capacitors to build the highspeed reducedswing circuit, used negative feedback and Miller compensation to stabilize the common mode. In 0.18 μm process of SMIC with 1.8 V power supply, the driver circuit worked at 150 mV swing, 1 Gbpsperpin and its PSRR over 60 db.
Key words: sublow voltage differential signaling (SubLVDS); driver; differential; lowswing

参考文献(Reference):
[1]IEEE Std 1596.31996. IEEE Standard for LowVoltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI)[S]. Microprocessor and Microcomputer Standards Committee of the IEEE Computer Society,1994.
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[4]BRATOV V, BINKLEY J, KATZMAN V, et al. Architecture and implementation of a lowpower LVDS output buffer for highspeed applications[J]. IEEE transactions on Circuits and SystemsI:Regular papers, 2006,53(10):2101-2108.
[5]CHOW H C, SHEEN W W. Low power LVDS circuit for serial data communications[J]. International Symposium on Intelligent Signal Processing and Communication Systems,2005(12):293-296.
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